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[Software Engineeringcpu-16-vhdl

Description: 16位cpu的vhdl源代码。 自己看看,没有注释。-16 cpu vhdl the source code. See for yourself, not Notes.
Platform: | Size: 94995 | Author: 童宗挺 | Hits:

[Other resource8-cpu

Description: 8位CPU的VHDL设计,16条指令系统,以及部分测试代码,开发工具是quartusii_60_pc
Platform: | Size: 2883 | Author: FJ | Hits:

[VHDL-FPGA-Verilogcpu16

Description: 一个16位cpu的vhdl代码。具体内容我也不清楚,自己慢慢研究吧-a 16 cpu of VHDL code. Specific content is not clear to me that their study it slowly
Platform: | Size: 3072 | Author: 王林 | Hits:

[VHDL-FPGA-VerilogcpuTerminate

Description: 用VHDL 编写的一个16位的cpu 设计方案,可以执行8条指令。-use VHDL to prepare a 16 cpu design of the program, the implementation of eight instructions.
Platform: | Size: 2108416 | Author: 宋文强 | Hits:

[VHDL-FPGA-Verilogthe-design-of-16-bit-cpu

Description: 用vhdl硬件语言设计的16位cpu,上传的压缩包既包含源代码又包含详细的文档说明。-with vhdl hardware design language of the 16 cpu, Upload compressed contains both the source code also contains a detailed document shows.
Platform: | Size: 128000 | Author: 晶晶 | Hits:

[Software Engineeringcpu-16-vhdl

Description: 16位cpu的vhdl源代码。 自己看看,没有注释。-16 cpu vhdl the source code. See for yourself, not Notes.
Platform: | Size: 95232 | Author: 童宗挺 | Hits:

[VHDL-FPGA-Verilogalu

Description: 16位RISC CPU的ALU,使用VHDL编写-16-bit RISC CPU
Platform: | Size: 2048 | Author: 李斌 | Hits:

[VHDL-FPGA-VerilogCPU

Description: 简单的16位CPU的VHDL设计 vhdl代码和cpu设计过程-Simple 16-bit CPU design of the VHDL code and VHDL design process cpu
Platform: | Size: 1488896 | Author: kilva | Hits:

[VHDL-FPGA-VerilogMyCPU16

Description: 16位cpu设计VHDL源码,其中包括alu,clock,memory等部分的设计-16 cpu design VHDL source code, including alu, clock, memory and other parts of the design
Platform: | Size: 1089536 | Author: 孙冰 | Hits:

[VHDL-FPGA-Verilog8-cpu

Description: 8位CPU的VHDL设计,16条指令系统,以及部分测试代码,开发工具是quartusii_60_pc-8-bit CPU of the VHDL design, 16 instruction, as well as some of the test code, development tools is quartusii_60_pc
Platform: | Size: 3072 | Author: FJ | Hits:

[OS program16cpu

Description: 实现16位的cpu设计 内容使用verilog hdl实现,具体的实现步骤方法,都已经写到文档里面去了!-To achieve 16-bit design of the contents of the cpu using verilog hdl achieve, the specific methods to achieve these steps have already been written inside the document went to!
Platform: | Size: 440320 | Author: gimel_sh | Hits:

[VHDL-FPGA-Verilogcpu

Description: 16位元浮点数CPU,可作运算,以VHDL编写-16-bit floating point CPU, can be used for computing in order to prepare VHDL
Platform: | Size: 2048 | Author: 朋友 | Hits:

[OS programCPU

Description: CPU编程,比较低层的硬件编程的 chm 资料文件--
Platform: | Size: 2714624 | Author: 张希行 | Hits:

[VHDL-FPGA-Verilogcpu-16-vhdl

Description: 用vhdl语用实现简单的16位cpu功能-Pragmatic use vhdl simple function of 16-bit cpu
Platform: | Size: 95232 | Author: 陈曦 | Hits:

[VHDL-FPGA-VerilogCPU_16_Beta_1.0

Description: VHDL CPU 16 16位的简易CPU 开发工具为Xilinx-VHDL CPU 16 a simple CPU in VHDL
Platform: | Size: 2526208 | Author: sigmax6 | Hits:

[VHDL-FPGA-VerilogCPU

Description: 用VHDL编的简易16位和8位CPU,可完成加减乘法移位等功能,拥有源码和设计文档,资料齐全-Compiled with VHDL simple 16-bit and 8-bit CPU, to be completed by addition and subtraction multiplication shift functions, with source code and design documents, data and complete
Platform: | Size: 1489920 | Author: 雄鹰 | Hits:

[ARM-PowerPC-ColdFire-MIPS16-bit_cpu_design

Description: 详细介绍了如何设计一个简单的16位cpu.其中包含了从最基础的指令系统开始到最复杂的cu控制器的设计思路,方案.最后还介绍了一些有关vhdl语言的用法,并给出了具体的cpu部件的vhdl代码,从而帮助大家更为深刻的学习如何设计一个简单的cpu-Described in detail how to design a simple 16-bit cpu. Which contains the most basic instruction from the beginning to the most complex cu controller design ideas, program. Finally the author describes some of the vhdl language usage, and gives vhdl cpu specific parts of the code to help you more deeply to learn how to design a simple cpu
Platform: | Size: 1051648 | Author: 罗高 | Hits:

[VHDL-FPGA-Verilogcpu

Description: 16位的CPU的VHDL程序~~还有附加的生成波形,可以应用于课程设计中-16-bit CPU, VHDL ~ ~ There are additional procedures for generating waveforms, can be applied to curriculum design
Platform: | Size: 1053696 | Author: liuying | Hits:

[VHDL-FPGA-Verilogvhdl-cpu-16-bit

Description: VHDL processsor 32 bit ALU SRF BUS DATA ADRESS C16 System On Chip Architecture
Platform: | Size: 976896 | Author: luis | Hits:

[VHDL-FPGA-Verilogcpu

Description: 计算机设计与实践实验 16位cpu设计 使用用VHDL语言 -16-bit cpu design with VHDL
Platform: | Size: 1026048 | Author: yuwentao | Hits:
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